VHDL code and IP core Development-Outsourcing

We offer the development of FPGA-IP cores defined by our customers in Next Generation Broadband Networks area and according to the existing ITU, IEEE, 802.xx, …and other telecommunications standards and proprietary models as well.
The key features of our FPGA / IP Core design expertise are:

• RTL coding in VHDL
• FPGA SoC implementation
• IP core development & integration (VHDL)
• High-speed designs with high logic complexity
• Special know-how in high-speed interfaces and protocol stacks development
• RTL synthesis and optimization (floorplanning, constraining)
• Gate-level simulation, design verification & test vector generation
• Proof of concept on customer’s evaluation boards, Hardware tests
• Complete system design (from specs to RTL to synthesis to fully tested device, incl. board)

Besides, there are already many high-performances, FPGA, worldwide telecom proven System on Chip solutions available (see Products). We also offer to assist customers with design specification of the desired platform - starting from a system design specification, architectural analysis, optimization, emulation… up to a reliable hardware design.

    Vedas d.o.o., 21C Stegne, Ljubljana 1000, Slovenia-EU  I  Phone: +3861 511 11 11   I   Fax: +3861 422 26 11   |   Contact us